EDN

Timing-driven Simulink FPGA synthesis

Simulink is popular among DSP designers, and FPGA vendors have taken note. These vendors have created blockset libraries that enable Simulink designs to be synthesized to an FPGA implementation. While ...
Design-Reuse

Microsemi Collaborates with MathWorks to Deliver First Integrated FPGA-in-the-Loop Workflow for PolarFire and SmartFusion2 FPGA Development Boards

ALISO VIEJO, Calif. -- April 19, 2018-- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today ...
EDN

FPGA video programming with Agility’s graphical environment

To make FPGAs accessible to DSP engineers without hardware design expertise, FPGA and tool vendors have developed tools that allow FPGAs to be programmed in high-level behavioral languages such as ...
Business Wire

MathWorks Speeds Up FPGA-in-the-Loop Verification

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced new capabilities in HDL Verifier to speed up FPGA-in-the-loop (FIL) verification. The new FIL capabilities enable faster communication with ...
Electronics Weekly

MathWorks adds FPGA support to xPC Target

MathWorks now supports FPGA with its xPC Target 5.0 prototyping workflow. The xPC Target tool can be used to execute Simulink and Stateflow models on a target computer for control prototyping, ...
Electronics Weekly

Microsemi and MathWorks support FPGA-in-the-loop verification

Microsemi and MathWorks launched hardware support for FPGA-in-the-loop (FIL) verification workflow with Microsemi FPGA development boards. The integrated FIL workflow with HDL Coder and HDL Verifier ...
Electronic Design

Facing Up To Today’s FPGA Verification Challenges

Fifteen years ago verification of FPGA designs was easy but as the size of FPGAs has increased so have the verification challenges, Jerry Kaczynski explains. Today it is not unusual for FPGA users to ...
New Electronics

First integrated FPGA-in-the-loop workflow for PolarFire and SmartFusion2 FPGA development boards

Microsemi has announced a collaboration with MathWorks to launch hardware support for field programmable gate array (FPGA)-in-the-loop (FIL) verification workflow with Microsemi FPGA development ...